A special issue of International Journal of High Performance Systems Architecture
The ever-increasing needs of present and future computation-intensive applications have fuelled multiple research programmes worldwide to develop new and innovative computing techniques and architectures that can deliver accelerated computing capacity, superior data throughput, and the ability to aggregate substantial distributed computing power.
In the context of embedded computing systems, the increasing demand for computation capabilities represents an hot issue, which is exacerbated in mobile applications and in particular for the so called ambient intelligent applications.
More noticeably in recent years, the field of computer architecture has seen a rapidly expanding interest in power-aware computing at architectural and software level. Power dissipation has become a first-order design constraint in virtually every type of computing system.
This special issue welcomes contributions in recent new developments and trends in power-efficient, high performance computing architectures, novel applications, as well as survey and future directions. We invite submissions of regular papers with unpublished original results and, by invitation, the revised and extended version of the papers presented in the High-Performance Computing Architectures (HPCA) Track at the 6th International Conference on Information Technology: New Generation (ITNG).
Topics of interest include, but are not limited to, the following:
- System-on-chip and network-on-chip architectures
- Multicore processor architecture
- Application modelling and mapping schemes for multicore/SoC systems
- Multicore computing and programming techniques
- Power modelling and management schemes for multicore/SoC systems
- Power-efficient architectures and techniques
- Embedded computing systems and their applications
- Reconfigurable architectures
- Nanocomputers and nanocircuits
- Secure and reliable processor designs
- Advanced computer architectures for general and application-specific enhancement
- Parallel computer architectures
- Application-specific processor/architecture designs
- Cache and memory systems
- High-performance I/O systems
- Interconnect and network interface architectures
- Microarchitecture design techniques: instruction-level parallelism, pipelining, caching, branch prediction, multithreading
- Computer arithmetic
- Innovative hardware/software trade-offs
- Modeling and performance analysis
- Complier designs
- Tools and methodology for architecture designs
- Verification and testing techniques
Submission of manuscript: 1 September, 2009
Notification of acceptance: 1 December, 2009
Submission of final journal version: 1 February, 2010